In modern integrated circuits, the channel length of the transistors is reduced, and the supply voltages are also reduced. But the threshold voltages of the transistors cannot be reduced so quickly due to the physical properties of the materials used, which decreases the operating range of the transistors and makes noises comparable to them. Therefore, it is necessary to eliminate the influence of noise sources in the circuits, in particular, reflections between the transmission line and the output of the transmitter. A system is proposed for calibrating the output impedance of the transmitter based on an accurate external resistor with comparator unit offset voltage compensation. Existing analog and reference frequency based solutions have key disadvantages such as the inability to compensate the offset voltage after the integrated circuit is fabricated, and the distribution of the calibration voltage across the Input/Output device and constant power consumption during the operation. The proposed circuit includes a high-precision digital-to-analog converter to compensate the comparator offset voltage. It generates calibration codes for the pull-up and pull-down parts of the transmitter output buffer, and provides fine tuning of the output impedance. The circuit was modeled using 16 nm FinFET process elements and simulated with HSPICE simulator.
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